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→40 PIN SPI test
<li><p>As can be seen from the figure below, the SPI available for Orange Pi 5 Plus is SPI0 and SPI4</p>
<p>[[File:media/image304.png|575x137px]]</p></li>
<li><p>The corresponding pins corresponding to SPI0 and SPI4 are shown in the table below. SPI4_M1 and SPI4_M2 can only be used at the same time, and they cannot be used at the same time. They are the same SPI4, but they are just getting different pins. Please don't think that they are two different SPI bus。</p></li></ol>
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| style="text-align: left;"| '''None'''
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</ol>
<ol start="3" style="list-style-type: decimal;">
<li><p>In the Linux system, the SPI in 40 PIN is closed by default, and it needs to be opened manually to use. The detailed steps are shown below：</p>
<ol style="list-style-type: lower-alpha;">
<li><p>First add the following configuration to the > '''/boot/extlinux/extlinux.conf'''</p>{| class="wikitable" style="width:800px;" |-|
<p>[orangepi@orangepi ~]$ '''sudo vim /boot/extlinux/extlinux.conf'''</p>
<p>LABEL Orange Pi</p>
<p>LINUX /Image</p>
<p>FDT /dtbs/rockchip/rk3588-orangepi-5-plus.dtb</p>
<p>'''<span style="color:#FF0000">FDTOVERLAYS /dtbs/rockchip/overlay/rk3588-spi0-m2-cs0-cs1-spidev.dtbo</span>'''</p>|}<p>The red font demonstrated the configuration of opening the '''<span class="mark">SPI0-M2 and using the CS0 and CS1 pin</span>'''. The other configurations are shown in the table below, and the corresponding dtbo configuration can be added to '''<span style="color:#FF0000">FDTOVERLAYS</span>'''</p></li></ol></li></ol>
{| class="wikitable" style="width:800px;"
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| style="text-align: left;"| '''SPI bus'''
| style="text-align: left;"| '''/dtbs/rockchip/overlay/rk3588-spi4-m2-cs0-spidev.dtbo'''
|}
</ol>
<ol start="2" style="list-style-type: lower-alpha;">
<li>Then '''restart the OPi OS Arch system'''</li></ol>
</li></ol>
<ol start="4" style="list-style-type: decimal;">
<li><p>After the restart, enter the system first to check whether there is a '''spidevx.x''' device node in the Linux system. If it exists, it means that the SPI has been set and can be used directly</p>
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<p>[orangepi@orangepi ~]$ '''ls /dev/spidev*'''</p>
<p>/dev/spidev0.0 /dev/spidev0.1 /dev/spidev4.0 /dev/spidev4.1</p>
|}{| class="wikitable" style="background-color:#ffffdc;width:800px;" |-| <big><p>'''The above is the result displayed after opening the spi0-m2-cs0-cs1-spidev and spi4-m1-cs0-cs1-spidev'''</p></big>|}</li>
<li><p>Then do not connect the SPI0 or SPI4 MOSI and MISO pins, and run the output result of the spidev_teest as shown below. You can see that the data of TX and RX are inconsistent</p>
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<p>[orangepi@orangepi ~]$ '''sudo spidev_test -v -D /dev/spidev4.0'''</p>
<p>'''Or'''</p>
<p>bits per word: 8</p>
<p>max speed: 500000 Hz (500 KHz)</p>
<p>TX | FF FF FF FF FF FF '''<span style="color:#FF0000">40 00 00 00 00 95</span>''' FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF F0 0D | ......@.…▒..................▒.</p><p>RX | FF FF FF FF FF FF '''<span style="color:#FF0000">FF FF FF FF FF FF</span>''' FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF | ............................….</p>|}</li>
<li><p>Then the output of spidev_test, which is then connected to SPI0 or SPI4 MOSI and MISO, is as follows. You can see that the sending and receiving data can be seen, indicating that the SPI loop test is normal</p>
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<p>[orangepi@orangepi ~]$ '''sudo spidev_test -v -D /dev/spidev4.0'''</p>
<p>'''Or'''</p>
<p>bits per word: 8</p>
<p>max speed: 500000 Hz (500 KHz)</p>
<p>TX | FF FF FF FF FF FF '''<span style="color:#FF0000">40 00 00 00 00 95</span>''' FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF F0 0D | ......@.…▒..................▒.</p><p>RX | FF FF FF FF FF FF '''<span style="color:#FF0000">40 00 00 00 00 95</span>''' FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF F0 0D | ......@.…▒..................▒.</p>|}</li></ol>
<span id="pin-i2c-test-2"></span>
=== 40 pin I2C test ===
